Methodologies and CAD Tools for the Design of Asynchronous Systems

Asynchronous (or clockless) digital design is the focus of renewed interest, as designers face increasing challenges in future chip design. These circuits promise three important benefits: high performance, scalability and design reuse, and low power. This project is investigating two basic problems in asynchronous system design: (1) design of high-speed pipelines and pipelined datapath units (adders, multipliers, etc.), and (2) computer-aided design (CAD) algorithms and tools for the synthesis and optimization of distributed control. Multi-Giga Hertz asynchronous pipelines are being designed, where stages only communicate with their neighbors, and where timing optimizations are applied locally. Using this approach, a substantial pipelined datapath component (adder/multiplier) is being designed, laid out and evaluated. CAD tools for asynchronous distributed control are also being developed, using new bottom-up (clustering) and top-down (partitioning) algorithms.